I3C Cafe - Now Brewing: A New Digital Protocol
Debug for I3C Interop Event Planned for June 2023
Earlier this week it was announced that the MIPI Debug Working Group is guaging interest in a MIPI Debug for I3C Interoperability event to be held at the June 2023 MIPI Alliance Member Meeting in San Jose, California.
While the I3C Interop Workshop held in 2022 was hosted by the MIPI I3C Working Group and focused on broad I3C implementations, this workshop aims to dial in on the recently released Debug for I3C specification. The full text of the brief annoucement can be found below:
The event will concentrate on checking the interoperability of these devices against the foundational requirements of Debug for I3C v1.0 to ensure features such as the debug-specific common command codes (CCCs) and in-band interrupts (IBIs) are working.
Participants would be asked to bring one or more of the following devices for testing:
- Debug and Test System (DTS), also referred to as the I3C Controller
- Test System (TS), also referred to as the I3C Target, and/or
- Protocol Analyzer
Those interested in attending are asked to fill out the interest form on MIPI's website. While it's not explicitly stated in the announcement, I believe it is open to non-members, given that I3C Basic and Debug for I3C are available for non-member implementation. (Last year's I3C Interop Workshop held at the MIPI Member Meeting in Munich was open for non-members.)
I'm really looking forward to this event and am excited for the opportunity to test our I3C Basic Protocol Analyzer Plugin through another round of real-world testing, specifically in the context of the Debug for I3C specification.
If you're planning on attending the MIPI I3C Interop Event, please reach out to us at i3ccafe@binho.io, we'd love to meet you!
Already working with I3C? Check out our I3C Basic Protocol Analyzer Plugin for Saleae Logic...
Read More from I3C Cafe...
Diodes Inc. Announces High-Speed I3C 1:2 Mux
Aside from I3C-capable Controllers and Targets, another category of devices that are imperative for successful and wide-spread industry adoption of the I3C protocol are interface devices such as switches/muxes, buffers/level-shifters, etc. Diodes Inc. recently announced[pdf] their first I3C interface device, the PI3CSW12, a 1:2 Mux/DeMux with Output Enable control signal.
NXP RT500 & RT600 Crossover MCUs Enable I3C Development Today
The iMX RT Crossover Microcontrollers are an interesting beast. They've got some interesting bells and whisltes, but the real reason that I'm writing about them today is due to the fact that the RT500 and RT600 series devices feature I3C peripherals.
Renesas Launches PMIC for DDR5 DIMMs With I3C Support
With I3C being the standard for DDR5 management, it only makes sense that the ecosystem of supporting components also adopt I3C as their primary communication interface.
MIPI® and I3C® are registered trademarks owned by MIPI Alliance. I3C BasicSM, Debug for I3CSM, I3C HCISM and DisCo for I3CSM are service marks of MIPI Alliance. I3C Cafe is an independent publication (blog) and is not affiliated with nor sponsored or endorsed by the MIPI Alliance. Saleae® and Saleae Logic® are registered trademarks owned by Saleae Inc.