// application note

AN0010 Bringing up a CMIS optical module over SPI with the Binho Pulsar

SPIMCI, the SPI management interface added to CMIS in revision 5.3 for co-packaged optics, encodes acknowledgement as 00h. An idle bus, an unpowered module, or a target that was never armed therefore returns a byte perfect acknowledgement followed by zero data, and a bring-up that appears to succeed proves nothing. A second obstacle compounds it: the flow control byte count is not on the wire and is derived from registers that cannot be read until it is already known. This application note brings up a SPIMCI link from a Binho Pulsar or Supernova in a way that a silent bus cannot fool, and supplies a command that establishes both unknowns from the module's own checksum.

Products: Binho Pulsar
Protocols: SPI
Topics: CMIS
Revision: Rev 1.0 · November 6, 2026

// outcomes

What you'll walk away with

By the end of this document a reader with the hardware in front of them will have established the flow control byte count and the R/Wn polarity their module implements, read its identity, and validated its Page 00h checksum, having accepted no intermediate result that an absent module could have produced.

The document covers the SPI management interface, CMIS Appendix B.3, normative and introduced in revision 5.3. AN0008 covers the register model and is a prerequisite. Co-packaged optics system design is out of scope.

// background

Background

You wire up a SPIMCI module, issue a read, and it works. The transaction completes, the acknowledgement is there, and data comes back.

The module is not powered.

SPIMCI encodes ACK as 00h (B.3.7.1.2), so all zeros is a valid acknowledgement followed by zero data. Binho reproduced exactly this on the bench: the read completed, the acknowledgement was seen, and the data was 00 00. A completed SPIMCI transaction is never, by itself, evidence that a module is present.

This note brings up a SPIMCI link in a way that silence cannot fake, and solves the second problem SPIMCI hands a host along the way.

// applicable devices

Applicable devices

Item	Role	Basis
Binho Pulsar	Host adapter, SPI controller	Not yet exercised for this note
Binho Supernova	Host adapter, SPI controller	Exercised as the controller, Section 8.1. No SPIMCI target was present
Any CMIS module with a SPIMCI interface	Target	Not yet exercised for this note

No SPIMCI module has been attached at revision 1.0. The framing, the flow control derivation and the polarity contradiction are taken from OIF-CMIS-05.3 Appendix B.3, cross-checked against 05.4. What has been exercised is the host side and the failure mode: the forged acknowledgement was observed on a bus with no module attached on 15 August 2026, and again on 2 September 2026 against a present but silent board, where it defeated the checksum guard as well. Everything that depends on a module answering is outstanding.

// what's covered