// application note

AN0016 Reading a DDR5 SPD hub and driving Corsair RGB over the DIMM sideband with the Binho Supernova

A DDR5 module carries an SPD5118 hub on its sideband bus: the SPD NVM, a temperature sensor, and a gateway to other devices on the module. This application note reads that hub from a Binho Supernova, in I2C mode and in I3C mode, and drives the RGB lighting controller of a Corsair DDR5 module, which sits behind the hub. It gives the register sequences, the I3C rates that returned correct data on one bench, a failure in I3C register writes that hung the bus until the module was power-cycled, and two Python scripts on pycosmicsdk.

Products: Binho Supernova
Protocols: I3C I2C
Topics: DDR5 SPD
Revision: Rev 1.0 · November 6, 2026

// outcomes

What you'll walk away with

This document covers:

identifying the SPD5118 hub, reading its temperature sensor, and reading the 1 KB SPD NVM
reading the PMIC status, read-only
switching the hub to I3C with SETAASA, reading it in SDR, and returning it to I2C with RSTDAA
the I3C rates that returned correct data on this bench, and the one that did not
the Corsair RGB controller behind the hub: taking it out of firmware-update mode, setting colours per LED, and starting a hardware effect

It does not cover writing the SPD NVM, writing hub registers over I3C (Section 5.3 explains why), in-band interrupts from the hub (attempted, none received), PEC, or access to the RGB controller with the hub in I3C mode (not tried).

// background

Background

A DDR5 DIMM exposes a two-wire sideband (HSCL, HSDA) separate from the memory bus. On it the SPD5118 hub answers first; it holds the module's SPD data, reports temperature, and forwards traffic to other devices on the module's local bus, such as the PMIC and, on lighting modules, an RGB controller. The hub starts in I2C mode and can be switched to I3C.

This note covers reading the hub and those devices from a host adapter, without a motherboard.

// applicable devices

Applicable devices

Role	Part	Identifier	Basis
Host adapter	Binho Supernova	hardware revision C, firmware 4.6.1	measured, this document
SPD hub	SPD5118 on the module below	MR0-1 `51 18`, MR2 revision `0x14`	measured, this document
PMIC	PMIC on the module below	address `0x48`	read-only status, measured
RGB controller	Corsair Vengeance RGB RS DDR5, 6 LEDs	VID `0x1B1C`, PID `0x0B00` in firmware-update mode, `0x0B01` in normal mode	measured, this document
Module	Corsair `CMG16GX5M2E6000Z36` (one DIMM of the kit)	SPD byte 2 `0x12` (DDR5), byte 3 `0x02` (UDIMM)	measured, this document
Other SPD5118 modules	any DDR5 UDIMM or SODIMM	MR0-1 `51 18`	Sections 5.1 and 5.2 follow JESD300-5; not tested beyond one module
Other Corsair DDR5 RGB modules		other PIDs	not tested

// what's covered

What's covered in the note

01 Introduction
02 System overview
03 Hardware setup
04 Software setup
05 Registers and protocol
06 Procedure
07 Measured results
08 Troubleshooting

The full procedure, measured results, and reference code are in the PDF and the assets archive.

// materials

What you'll need

Binho Supernova USB host adapter for I3C, I2C, SPI & UART View product

Software Mission Control 3 or the Cosmic SDK (Python, C / C++ / C#). Get the software

Files The reference scripts and assets used in this note. Download the assets

// our edge

We don't just follow the I3C spec.

We don't watch from the sidelines. Plugfest after plugfest, our team is in the room where vendor I3C implementations come together — finding edge cases, debugging quirks, and validating real silicon against the spec.