// NVMe-MI over I3C
Bring up and debug
NVMe-MI over I3C.
Out-of-band SSD management is moving to an I3C sideband: EDSFF drives a BMC can inventory, monitor, and update without touching the host. Binho gives you the tools to bring it up, decode the full stack, and debug what breaks.
// out-of-band management
Manage every drive. Without the host.
NVMe-MI, the NVM Express Management Interface, is the standard way a BMC inventories, monitors, updates, and configures NVMe SSDs out of band: over a dedicated sideband, with no involvement from the host CPU or the PCIe data path.
NVMe-MI 2.0 adds an I3C binding for that sideband, and the industry is moving with it. The EDSFF form factors (E1.S, E1.L, and E3) adopted I3C for sideband management as the natural upgrade from SMBus: 12.5 MHz instead of 1 MHz, dynamic addressing, and in-band interrupts so a drive can raise an alert the instant something changes. Under the hood, NVMe-MI rides on MCTP over I3C.
// the stack
One health poll rides three layers.
A request starts life as an NVMe-MI command, becomes MCTP packets, and ends up as I3C private writes on the sideband. Every layer has to be right for the drive to answer.
// application layer
NVMe-MI commands
The management payload itself: poll Controller Health Status, read NVMe-MI Data Structures for inventory, get and set configuration, and tunnel NVMe Admin commands, all out of band, with no involvement from the host.
// message / transport layer
MCTP endpoints and messages
NVMe-MI rides on MCTP. MCTP addresses each drive by Endpoint ID, splits messages into packets carrying start / end-of-message flags and sequence numbers, and protects every packet with a CRC-8 PEC. Baseline MTU is 69 bytes: a 4-byte header, 64 bytes of payload, and 1 PEC byte.
// physical sideband
The I3C sideband
I3C is the sideband the drive answers on, at up to 12.5 MHz, with dynamic address assignment and in-band interrupts so a drive can raise an asynchronous event the moment something changes. EDSFF adopted I3C for sideband as the natural upgrade from SMBus.
// solutions
See every command. Then drive it.
One tool decodes NVMe-MI over I3C down to the wire. The other lets you generate the traffic and stand in for the drive.
Software · Saleae Plugin
I3C Protocol Analyzer Plugin
Every layer, down to the command.
Decodes the I3C sideband down to DAA, IBI, and CCC timing, and surfaces the MCTP and NVMe-MI transactions riding on top, inside the Saleae tool your engineers already use. When a health poll goes unanswered, you can see exactly which layer dropped it.
- I3C timing: DAA, IBI, CCCs, hot-join
- MCTP over I3C and NVMe-MI decode
- Full I3C spec coverage: v1.0, v1.1, v1.1.1, v1.2
Hardware · USB Host Adapter
Binho Supernova
Be the BMC, or the drive.
The Supernova drives the I3C sideband as Controller or Target, fully scriptable from Python and C. Generate NVMe-MI traffic like a BMC, stand in for a drive that isn't in hand yet, and reproduce the exact fault you're chasing, on the bench or in a regression rig.
- Operates as I3C Controller or Target
- Scriptable traffic via Python & C/C++ SDK
- SDR · HDR-DDR · point-and-click GUI
// our edge
NVMe-MI is only as solid as the I3C beneath it.
We don't watch from the sidelines. Plugfest after plugfest, our team is in the room where vendor I3C implementations come together: finding edge cases, debugging quirks, and validating real silicon against the spec.
// collaborations
Beyond the tools.
Our work lives inside the I3C industry's dev kits, app notes, and demos.
Bundled with the PIC18-Q20 Curiosity Nano.
As an official Microchip Development Tool Partner, we ship our I3C Protocol Analyzer plugin for Saleae Logic with every PIC18-Q20 Curiosity Nano dev kit. Microchip's lowest-cost I3C Target MCU board includes a free 45-day license, bundled directly with the hardware.
Read the announcement
Featured in their I3C application note.
AN5879, "Introduction to I3C for STM32H5 series MCU," is the 64-page document STMicro hands to every developer adopting I3C on STM32. The decoded I3C waveforms throughout the document are captures from our protocol analyzer.
View AN5879 (PDF) Powering their live I3C demo.
Microchip Try runs an interactive I3C session on a real PIC18F16Q20 board, accessible to anyone in the world via the web. Our Supernova USB-to-I3C controller is the device executing every transaction the demo issues.
Try the demo
MEMS sensor evaluation platform.
Our I3C Target Board accessory accepts Bosch's Shuttle 3.0 form-factor and STMicro's DIL24 evaluation boards, the two dominant sockets for I3C-capable sensor prototyping. Drop in your eval board, plug into the Supernova, decode the bus in seconds.
See the I3C Target Board// track record
We've been doing this for years.
Long enough to know where the gotchas live.
// 01 · standards
We help write the spec.
Binho is a MIPI Alliance Contributor Member, actively shaping I3C, the sideband NVMe-MI over I3C is built on.
// 02 · tools
We build the tools.
200+ semiconductor companies use Binho tools to develop, validate, and ship devices with I3C protocol support.
// 03 · plugfests
We prove it in the field.
We've verified our tools at the past 4 MIPI I3C Plugfests, and helped others verify theirs too.
// trusted by engineering teams at
+ hundreds more
Ready to bring up NVMe-MI over I3C?
From first drive bring-up to production regression, our I3C team knows where this stack breaks.